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    3,104 fpga e1 framer работ(-а,-ы) найдено, цены указаны в USD

    необходимо создать городской портал по примеру [войдите, чтобы посмотреть URL] еще пример [войдите, чтобы посмотреть URL] в нем должны присутствовать следующие разделы: Новости(автоматически копирующие новости с популярных новостных сайтов ) Работа вакансии/резюме Авто покупка/продажа/статьи яндекс карты пробки Недвижимость купля/продажа Баннерная система (реклама) Справка (погода, курсы ...

    $1405 (Avg Bid)
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    20 ставки
    Создание веб-сайта Завершено left

    необходимо создать городской портал по примеру [войдите, чтобы посмотреть URL] в нем должны присутствовать следующие разделы: Новости(автоматически копирующие новости с популярных новостных сайтов ) Работа вакансии/резюме Авто покупка/продажа/статьи яндекс карты пробки Недвижимость купля/продажа Баннерная система (реклама) Справка (погода, курсы валют, справочник предприятий города с карт...

    $304 (Avg Bid)
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    9 ставки

    Переделка конвертера с С# на С/C++. Использование типовых пакетов linux. Работа с потоком E1/PRI, HDLC, LAPD, X25

    $777 (Avg Bid)
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    Выписать в отдельную таблицу по полям Город, название, телефон, e-mail, сайт информацию об оптовых клиентах по городам России со следующих 6 сайтов. Пример таблицы во вложении. [войдите, чтобы посмотреть URL] [войдите, чтобы посмотреть URL] [войдите, чтобы посмотреть URL] [войдите, чтобы посмотреть URL] [войдите, чтобы посмотреть URL] [войдите, чтобы посмотреть URL]

    $150 (Avg Bid)
    Гарантированный

    Looking for excel vba expert to help write a vba macro for following logic: Steps: Setting the period (first and last column where code should be executed) 1. First column = Today's date + E1 2. Last column = Today's date + F1 Push out logic 1. Match the AZs (E8:E24) to Gap/Excess (B63:B77) 2. For each matching AZs, if there is a excess (above 0, positive value) push the value in push/...

    $173 (Avg Bid)
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    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

    $95 (Avg Bid)
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    3 ставки

    Dyumnin Semiconductors is in the ASIC/FPGA design business. We are looking for experienced PCB designers who can take our design sketches and convert it to functional PCB design. Please give references to past similar projects (FPGA+analog+high-speed) We are open for both hourly and fixed price contracts. Please provide your rate card for both in the bid document

    $27 / hr (Avg Bid)
    $27 / hr Ср. ставка
    10 ставки
    Crear VM con Issabel en VMware 5 дней(-я) left
    ПОДТВЕРЖДЕН

    Somos un call center argentino que trabaja con multicampaña. Necesitamos crear 3 VM (Maquinas virtuales) en un servidor Dell. En las 3 VM se deben instalar la versión mas reciente de Issabel (Central Telefónica). Debe esta bajo SO Linux. Parámetros: Configurar troncales y rutas salientes: Troncales: 1 Gateway synway GSM de 16 canales 1 Gateway Openvox GSM 12 canales...

    $399 (Avg Bid)
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    5 ставки

    Implementation of Fractional order Integer/ Derivative Using GL algorithm based VHDL on FPGA. simple code which i need.

    $92 (Avg Bid)
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    Our company is seeking for a passionate UI/UX Freelancers who working directly with a multi-national team of accomplished software engineers in India, South Africa, Colombia, and the US. Our UI/UX Freelancers interact directly with other tech team members, as well as functional business managers and end users for the product around the globe. [Removed for encouraging offsite communication which is...

    $13 / hr (Avg Bid)
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    FIR filter Design using FPGA 4 дней(-я) left

    I require a working code in verilog/VHDL/C for an FIR Filter to be implemented on an Altera FPGA

    $119 (Avg Bid)
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    FPGA Communications project 2 дней(-я) left

    We have a Quartus software license and two Arria 10 boards (Terasic Han Platform). We want to give video input to one of the FPGAs through USB-C port and transmit it to the other board with one or multiple serial lines. At the other board, we want to get this video as output from the USB-C port again. We have XTS-FMC Boards for connection between the two FPGAs. We need a highly experienced FPGA ...

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    About us All-in-one solution for market data, order interface, order management and risk controls – at FPGA network card Level. Support for multiple trading applications using a single interface to the exchange, yet providing individual view of the order books for each application. Many solutions that are currently available either crunch the speed tests or concentrate on functionality...

    $640 (Avg Bid)
    Местный
    $640 Ср. ставка
    4 ставки
    Build Project - Altera DE2-115 FPGA board 1 день left
    ПОДТВЕРЖДЕН

    I am currently using Altera DE2-115 FPGA board to configure it using Quartus 17 lite edition software and write the code in VHDL. We have to use QSYS, and NIOS II for Eclipse to write a program in C and to run the board. I am seeking some help in building this mini thing.

    $27 (Avg Bid)
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    FPGA DESIGN ENGINEER 1 день left

    We are seeking 1 FPGA Design Engineer for our new product development. FPGA Design Engineer Responsibilities: • Completing implementation in RTL • Ensuring robust and complete timing constraints • Optimizing FPGA code to balance performance, area, power, complexity and timing • Determining and executing development, integration, bring-up and test plans. • Working closely ...

    $39 / hr (Avg Bid)
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    21 ставки
    Create some wireframes 11 часов(-а) left

    I have a web application which serves as an internal tool for my company. I want a UI/UX designer to take a look at it and revamp the design of it by creating some wireframes using a tool like Sketch or Framer X.

    $124 (Avg Bid)
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    22 ставки

    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

    $50 (Avg Bid)
    $50 Ср. ставка
    5 ставки
    FPGA Engineer Завершено left

    For a Software Defined Radio module we are looking for a senior FPGA engineer. - Process all received data - Filter data for results - Etcetera To process and filter the data on the modules and possible FPGA within a specific SDR device. You will work with persons out of our team. You solve and test the issues they implement. Budget $800

    $969 (Avg Bid)
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    BladeRF (Software Defined Radio) Завершено left

    BladeRF specialist is needed that has experience with SDR (Software Defined Radio). We would like to set certain functions in the BladeRF: - Receiver (capture data) - Transmitter (page request) - Process all received data - Filter data for results - Multi bands simultaneously - Software define directional radio/antennas - Software define reach/width radio/antennas - Etcetera Require solution to ...

    $908 (Avg Bid)
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    Eye pupil tracking Завершено left

    I would like to do project in human eye pupil tracking system for video sequence using Verilog in Xilinx spartan 6 FPGA. Here with attached my equirements Requirements: 1. Find the pupil center coordinates and radius for various eye's. 2. Coordinates should be constant intervals while tracking. 3. Only video sequence to be used.... Not for image. Kindly send me possibility of above …...

    $69 (Avg Bid)
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    Program a project Завершено left

    I am a worker for a software company. I am currently using Altera DE2-115 FPGA board to configure it using Quartus software. We have to use NIOS II processor, QSYS, and Eclipse to write a program and to run the board. I am seeking some help in building this mini thing.

    $17 / hr (Avg Bid)
    $17 / hr Ср. ставка
    14 ставки
    implementing 8-bit comparator Завершено left

    i need a 8-bit comparator characterizing overdrive, to be implemented on FPGA, using Verilog also I need the constrains file

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    3 ставки
    FPGA Board Expert Завершено left

    An expert on FPGA Board should bid only, showing a sample work will be an advantages

    $235 (Avg Bid)
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    8 ставки
    Electronic engineer required Завершено left

    I am looking for electronic engineers having expertise in different microcontrollers like FPGA, Raspberry Pi, Arduino, PIC, ESP and many others having expertise in programming. I will share details of projects in chat

    $21 (Avg Bid)
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    FPGA/VHDL/Verilog Завершено left

    Looking for implementation of a Ethernet Tester, generating and analyzing Ethernet traffic at 1G and 10G. More details on PM. J

    $12 / hr (Avg Bid)
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    We need to develop a digital multiplier circuit and we need to test the circuit design, Implement it in software environment and simulate the circuit functionality. This is going to be part of a bigger project (ARM IP Core, DSP CPU) and we may need to compare the circuit functionality with some other recommended multiplier in terms of speed and foot print.

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    mining software fpga Завершено left

    we need expierenced partner to build fpga mining software

    $20 / hr (Avg Bid)
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    Please read carefully. You need to fix my code. I will sent to you in messages my project. Here is project description: The brightness measurement with help of PMODALS sensor ([войдите, чтобы посмотреть URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([войдите, чтобы посмотреть URL]) is to be used, which takes over the...

    $522 (Avg Bid)
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    14 ставки
    FPGA Board Завершено left

    An expert on FPGA Board should bid only, showing a sample work will be an advantages

    $72 (Avg Bid)
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    12 ставки
    Fpga labview programming Завершено left

    Need expert labview for fpga control of an instrument

    $50 / hr (Avg Bid)
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    5 ставки
    FPGA project Завершено left

    I am looking for FPGA expert..

    $178 (Avg Bid)
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    6 ставки
    GPS implementation Завершено left

    first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PCB of the board you have. U3 is ...

    $336 (Avg Bid)
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    Building a simple (for now) banking app, a rough prototype already exists in Framer X, and we need a designer to make it actually look nice. The ideal candidate would be creating high fidelity, high quality designs of the described screens (or making the current ones look nice), with the necessary style guide, and component library. OSX user preferred for now (SF Pro font, SF Pro Text icons, iOS...

    $249 (Avg Bid)
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    24 ставки
    FPGA program in singapore Завершено left

    Im looking for personnel to work on FPGA program in Singapore ,must be able to read current program or create an new program as required .Any one interested please contact me

    $330 (Avg Bid)
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    15 ставки
    build me a CMOS sensor Завершено left

    I need a line scan CMOS sensor (pixel size 14 micron X 200 microns) capable of line scan at a rate of 80KHz and output the data through ethernet to Xilinx FPGA.

    $523 (Avg Bid)
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    FPGA Electric Engineering Завершено left

    Hello, We are looking for a FPGA electric engineer who can help us engineer a FPGA board, customize an existing board. Preferable who can also develop in Python and C to connect the FPGA board with a RaspberryPi, and develop programs on both boards. You will receive project information later.

    $1154 (Avg Bid)
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    Project for Rajagopal S. Завершено left

    Hi Rajagopal S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. The brightness measurement with help of PMODALS sensor ([войдите, чтобы посмотреть URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([войдите, чтобы посмотреть URL]) is to be used, which takes over the ...

    $221 (Avg Bid)
    $221 Ср. ставка
    1 ставки
    Clean, format and validate data Завершено left

    There are three data files 1. Organizers and Events Requirement Validate emails Remove records that do not have emails that validate Provide 2 files: a). File - with records that only contain validated emails b). File with old data - email not validated 2. Exporters Requirements a) Shorten Product Category Name - in all Product Category 1-7 columns Keep short name the same in all columns b) ...

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    FPGA unit phasor measurements Завершено left

    First task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop The second part of the project task is to populate the ADC and final amplifier stages on the PMU PCB, together with power...

    $200 (Avg Bid)
    $200 Ср. ставка
    4 ставки
    Research help -- 3 Завершено left

    Hello, this is the task: "first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PC...

    $316 (Avg Bid)
    $316 Ср. ставка
    8 ставки

    Hi. I have a Terasic De1SoC and would like to learn how to use it. I am completely knew and have seen content from a similar project and interested on these topics About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design Implementing various encryption and decrypt algorithms SystemVerilog VMM Methodology OVM Methodology UVM Methodology I have C programming background

    $33 / hr (Avg Bid)
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    1 ставки
    customization of an SDR Завершено left

    We are looking at scanning,capturing and decoding multiple cellular frequencies(European 2G/3G/4G(LTE) bands) with an SDR. Currently using a simple rtl-sdr for this case but seeing as it lacks the frequency range(max 1800mhz) and has very little bandwidth(2.4MHz) we would like to upgrade to a better SDR. The goal is to analyze multiple simultaneous communication channels in real time. We are loo...

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    PCB Design Завершено left

    Use the xtal oscillator board that I designed and that works together with the FPGA to read the GPS data and then synchronise the 40 MHZ Voltage controlled Xtal oscillator to the 1 second pulse produced by the GPS. I will provide more details on chat.

    $156 (Avg Bid)
    $156 Ср. ставка
    18 ставки
    FPGA expert needed Завершено left

    I am looking for an expert in FPGA, its not a simple task, only expert place bids. will share details in chat

    $20 (Avg Bid)
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    7 ставки

    Need someone who has the PLDa PCIe ipcore license for Xilinx Vivado to help compile a FPGA project. I'll give you the source code. You compile and give me the bit file and compiled project.

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    The test program used for transmited data between DDR4 of FPGA and DDR4 of PC adopted windows 10 or win7 system via PCIe 3.0 x8. A tested result shows that the speed of PCIE3.0 *8 is over 7GB/s , which is tested by xilinx Kcu1500 FPGA board. However, the speed under win7 / win10 is only about 4.5-4.9GB/s. The minimum speed threshold should be 5.5 GB/s. And it will be helpful if the speed...

    $7915 (Avg Bid)
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    5 ставки
    Basement framer -- 2 Завершено left

    Need basement framed. Labor only — no materials needed. Should only take a day.

    $387 (Avg Bid)
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    4 ставки