Fpga verilogvhdlработы
Добрый день Вы можете нам помочь с кодом vhdl cyclone 10 FPGA в программе Quartus Prime
Добрый день Вы можете нам помочь с кодом vhdl cyclone 10 FPGA в программе Quartus Prime
Разработка системы Формирования звуковых оповещений на основе FPGA
Разработка системы Формирования звуковых оповещений на основе FPGA,(Development of a system for generating sound notifications based on FPGA.)
Цветомузыка. Адресная светодиодная лента, фильтр по частотам (высокие, средние, низкие), в зависимости от громкости и частоты мигает лента разными цветами
Преобразователь CaN to Uart на FPGA
I want a Nand flash controller for FPGA, details in chat.
Hi Abdelhak T., I noticed your profile and would like to offer you my project. We can discuss any details over chat.
We are from an IT consulting firm and an online tutoring company One of our client is in need of assistance in Embedded Systems FPGA
I need bitstream for my card VCU1525 it has 64 GB of ram,need good hash rate. freelancer will deploy bitstream using vivado to my card and i will test its hashing rate and [войдите, чтобы посмотреть URL] i need the miner application to. also i need long term support,also write the word VCU in end of bid.
I am interested to work on a long term research project where I need to find a new robust method (Approach) in the area of Resource Constrained Devices with Machine/Deep Learning for memory optimization, algorithm optimization, deep compression using pruning and quantization. I am open to use Arm Cortex, ESP32, or an FPGA for hardware acceleration. These embedded system have limited power, memory...
Please see attached pdf file to get complete details related to this task. This required template has been added in zip file.....
Looking for Linux Kernel developers And FPGA developers to port the Mister Project Linux Kernel and U-Boot of DE10 Nano to the Xilinix Ultra96-V2 Zynq UltraScale+ ZU3EG. Once completed we need assistance porting of the existing FPGA cores of Mister Project to the zu3. Mister Project Linux Kernel: [войдите, чтобы посмотреть URL] Mister Project U-Boot: [войдите, чтобы посмотреть URL] [войдите, ...
Looking for Linux developers And FPGA developers to port the Mister Project Linux Kernel of DE10 Nano to the Xilinix Ultra96-V2 Zynq UltraScale+ ZU3EG. Once completed we need porting of Current developed D10 Nano cores to the zu3.
I'm required to design this architecture using VHDL. This architecture also consists of hops.
We have a HW card already built that captures data and stores it inside the LSRAM of Microsemi Polarfire FPGA. We use double buffering technique so while capturing new data in one buffer the other buffer is sending the data to the host from the other buffer. The host has to capture the data in real time. For that, the Host PCIE has to allocate multiple buffers (e.g. cyclic Fifo) so the copied da...
It is an easy project message me for details
Hello freelancers, I am looking for an expert in VHDL/FPGA for an interesting project. The project is very small and I encourage new freelancers to place the bid. My budget is 30-40 AUD
- Develop a micro-threaded RISC-V for low-overhead threading - Integrate with FPGA HLS tool to make a solution of micro-threaded HLS - Need to optimized PPA (Power Performance Area) - Require good problem solving skill - Require good written and oral communication kill
This project has multiple phase that need to be done. It is yo develop a system that demonstrate the error correction H(7,4) hamming codes Use of python, Verilog and arudino is also required
I'm a trader and I need an HPGA engineer foran ultra low latency fpga solution to trade on CME. I have a c++ reference implementation for most blocks, obviously this needs to be converted to hdL (verilog ideally). Functional requirements: - Msrket Data feed handler - Order book building (Last bid, ask, trade) - Line arbitration (Feed A and B arbitration) - orders sending - Exchange orders re...
I'm a trader and I need an HPGA engineer foran ultra low latency fpga solution to trade on CME. I have a c++ reference implementation for most blocks, obviously this needs to be converted to hdL (verilog ideally). Functional requirements: - Msrket Data feed handler - Order book building (Last bid, ask, trade) - Line arbitration (Feed A and B arbitration) - orders sending - Exchange orders re...
Need to develop stock Android Pie (9) to bypass the kernel and allow apps to communicate directly with an FPGA using DPDK protocol
I am looking for a robotics expert with good experience in VHDL/FPGA
I am looking for Electrical & Mechanical Engineers. I have a huge work load these days. I need experts in following areas of Electrical Engineering: 1) Control Systems 2) Intelligent & Adaptive Systems 3) Multimedia Communication & IoT 4) VHDL/FPGA I need experts in following areas of Mechanical Engineering: 1) Solidworks 2) ANSYS 3) Calculations based work 4) Report writing Experts ...
My research objective is to design an asynchronous barrel shifter in order to reduce its processing time compared to its synchronous counterpart that works on the worst-case delay model. I will design both synchronous and asynchronous shifter circuits in the same ASIC technology to compare their performance. The research aim is to reduce the worst-case delay of the shifter circuit to an average ca...
Particle Swarm Optimisation(PSO) tuned Fractional Order PID Controller for power electronics application using FPGA everything has to be in Verilog/VHDL.
I am looking for experts in VHDL/FPGA from pakistan for small tasks, I will share work details in chat
Job Description :- Create Verilog + Perl RTL from Microarchitecture document and SPEC document provided. Create Smoke testbench for the same. Make sure RTL is LINT clean, and simulation commandlines/waves are going fine in Vivado. Make sure Synthesis is fine and design/testbench is bug free. Detailed Requirement :- 1) Preference - Junior 0-4 years of experience engineer or senior around 10 pl...
Assalam o alaikum !!! I need experts in following areas: 1) Adaptive Systems (Matlab) 2) ASIC Design 3) VHDL/FPGA 4) Multimedia communication and IoT (Matlab) I have a lot of projects in these fields and looking for long term work relation.
I need a FPGA programmer to build a mining solution (Bitstream, driver, whatever is necessary) for mining Ethereum with a Xilinx U200 Card. The programmer should be able to develop everything what is necessary to run an ethereum miner on the following architecture: ASUS : Z10PE-D16-WS DDR 4 256GB Intel Xeon E5 2699 v4 Xilinx Alveo u200 SDAccl / Vitis / Vivado Ubunto as OS Please apply only...
Hi! I want to deploy a Bluespec RISC-V processor on FPGA and run C codes on it. There are two cores I am interested in: Piccolo and Flute, both available on GitHub. I want to deploy the processors on the Arty A7 Board (Artix-7) and ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGAs. At the moment, I was able to synthesise, implement and upload the bitstream to the FPGA. However, I need help to link t...
To design and implement a robotic system, RISC processors are considered vital as they provide security and reliability. You are required to program and demonstrate a 16-bit RISC processor for the given instruction set in VHDL. You are required to design and implement each component such as arithmetic logic unit (ALU), memory system, control unit etc. separately in VHDL and verify them on FPGA...
I am looking for experts in VHDL/FPGA for a project, I will share work details in chat. I have a simple task and my budget is 30$
I want Video Poker game for FPGA Board. You can chose Any FPGA Board which is support for game.
I want to use the Xilinx DPU with an analog camera. This camera use PAL or NTSC encoding. For converting this video signal to digital, I bought the ADV7180 which output is in BT.656 YCrCb 4:2:2 format. So I would like to have this video streaming available in a /dev/video* to feed the DPU with it. I have found in github some BT656 decoders ip core which work well. I think I have an idea of what a...
I need matlab code to be implanted on fpga chip to measure heartbeat if it is normal or not With clarification of each step of the code the price can be increased if the job worth it
I need someone to help me with designing image compression algorithms (JPEG (DCT), JPEG2000 (DWT), Fractal Image Compression) using MATLAB/Simulink-based System generator and deploy it on FPGA. I need someone who is an expert in Image Processing and FPGA design and synthesis tools. If anyone is interested I will share more information about the project & pay with them.
Hi, I need you to adapt this project ([войдите, чтобы посмотреть URL]) to Zedboard. Github's link is on the video description.
Complex communications project requiring a variety of abilities, of which this is one stage. In this tranche of work we are looking to create an 802.11ac transceiver in FPGA.
for more information plz contact me.
VHDL, DE2 Board 115, Ping pong game, max score is 16 and the ball speed should increase when the score is 10 and the ball color as well
Design of high performing fast fourier transfrom architecture using verilog code in Xilinx vivado and FPGA implementation.
Application for interfacing with TI AFE2256 chip, Based on Snickerdoodle KRTKL board. There is Existing FPGA (verilog / VHDL) for Artix design. Need to reconfigure project for Snickerdoodle board, Zynq/Linux and add some functionality. Develop a design using krtkl “snickerdoodle black” (digital back end).Translate firmware from existing Artix design to Z7 architecture of snickerdoo...
PLEASE DO NOT APPLY FOR THE JOB BEFORE YOU CLEARLY READ THE DESCRIPTION AND PROJECT TIMELINE FIRST PART: The entire goal of the project is to test different machine learning algorithms such as linear/logistic regression, decision tree regressor, KNN, and MLP ANN to find the best possible training, validation and test results in predicting space particles (Dataset has 5108 records). These algorith...
VHDL, DE2 Board 115, Ping pong game, max score is 16 and the ball speed should increase when the score is 10 and the ball color as well
I have an idea for a board that plugs into the PCIe slot of a computer and reads the memory directly and can also write to memory, basically a development board a Xilinx 7 series FPGA chip on it, the board will also need a (jtag) to upload instructions and will need a USB interface for communication. for reference I would like something similar to this product here. [войдите, чтобы посмотреть UR...
I am looking for somebody who can design me a schematic for a circuit I need. the idea I had was a device that plugs into the PCIe slot of a motherboard and can read/write directly to the memory of a computer like a DMA device, something similar to this product would be perfect [войдите, чтобы посмотреть URL], I need someone to design the schematic so that I can put it onto a PCB, the device wil...
Hallo Rajameenakshi V., ich benötige Hilfe bei einem MPC5748G Prozessor. Ich habe ein fertiges Projekt und das funktioniert sehr gut auf FPGA ich benötige dieses Projekt in diesem Prozessor ist das möglich dass man mir die Code schreibt.