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    1,674 vhdl work freelancer работ(-а,-ы) найдено, цены указаны в USD

    Добрый день всем! Есть алгоритм написанный в матлабе, алгоритм не большой. простой( пара массивов, пара циклов, простейшие вычисления) Необходимо его реализовать в VHDL. Спасибо.

    $23 (Avg Bid)
    $23 Ср. ставка
    4 ставки

    I need to write a VHDL code for transfer data from 2 zedboard using ethernet without using a zynq-processor

    $206 (Avg Bid)
    $206 Ср. ставка
    11 ставки

    I have a short project to do for an Altera 5M160Z CPLD (160 LE). This board has a 16-bit bus from a MCU and 8 control lines and output to a 10-pin port. What I need is a VHDL project (Quartus) that will implement a custom full duplex parallel to serial design. Development using simulation is fine.

    $19 / hr (Avg Bid)
    $19 / hr Ср. ставка
    11 ставки

    add memory protection into the operating system, This project needs both hardware and software knowledge, you will be creating / implementing OS functions on the PicoBla...hardware and software knowledge, you will be creating / implementing OS functions on the PicoBlaze, programming in assembler. You may also need to modify the hardware using VHDL.

    $499 (Avg Bid)
    $499 Ср. ставка
    11 ставки

    Hello guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attach the image table in the files section. Thank you a lot...

    $111 (Avg Bid)
    $111 Ср. ставка
    1 ставки

    Hello guys I...cache memory). I would comments on the code and the resulting image as deliverables. 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works. Again comments on the code please. P.S.: 8 by 8 vhdl integer divider I attach the image table in the files section. Thank you a lot for your bidding :)

    $25 (Avg Bid)
    $25 Ср. ставка
    3 ставки

    écrire un code vhdl , pour DE0 nano , permettant de lire la température a partir d'une entrée analogique avec un LM19 et en sortie il faut emmètre des son avec un buzzer ( différent fréquence en fonction de la température )

    $36 (Avg Bid)
    $36 Ср. ставка
    2 ставки

    Hello guys I will ...language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory) 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works I attach the image table in the files section. Thank you a lot for your bidding :)

    $28 (Avg Bid)
    $28 Ср. ставка
    3 ставки

    I need help with the structural in Xilinx. I will give you full details. Regards

    $24 (Avg Bid)
    $24 Ср. ставка
    24 ставки

    ...looking for Electrical & Electronics engineer Mechanical Engineer Civil Engineer Engineers should be expert in following fields Arduino Matlab Raspberry Pi FPGA Verilog/VHDL Python PCB Design (Eagle/Altium) Solidworks AutoCAD if you are expert in any of above mentioned fields then you can place a bid. We will prefer fresh Freelancers but having

    $38 (Avg Bid)
    $38 Ср. ставка
    112 ставки

    Hi, my name is Paride, nice to meet you. i have got your conctact from Alessandro, a classmate. I am working on a easy Vhdl project, i already wrote all the code, the simolulation is working, but i need your help for two fast tasks: • I need to assign the pins on my FPGA, i can't find the correct pin of 2 serial signals. • i need you to check if the

    $58 (Avg Bid)
    $58 Ср. ставка
    1 ставки
    $532 Ср. ставка
    12 ставки

    I want a content writer who knows digital design or digital electronics and vhdl subjects very well.

    $83 (Avg Bid)
    $83 Ср. ставка
    21 ставки

    Hi there! I'm based in Ahmedabad, India. This project is related to lightweight cipher, cryptography. I have attached a pdf containing information relevant to this project w...design so that I can perform power analysis on it. Need the code properly working in two days. I looking for a Clock based implementation on existing design Language used : VHDL

    $55 (Avg Bid)
    $55 Ср. ставка
    4 ставки

    Hi there! I'm based in Hyderabad, India. This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be found...clock based design so that I can perform power analysis on it. Need the code properly working in two days. Note: Clock based implementation on existing design Language used : VHDL

    $30 (Avg Bid)
    $30 Ср. ставка
    2 ставки

    Науково-дослідний проект в галузі неруйнівного контролю. ____________________________________________________________ Scientific research project in the field of non-destructive testing.

    $390 (Avg Bid)
    $390 Ср. ставка
    3 ставки

    Hi there! I'm based in Hyderabad, India. This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be ...individual modules are successfully executing but the final result doesn't appear which you can help me in debugging the same ) Note: Problem in debugging the code Language used : VHDL

    $158 (Avg Bid)
    $158 Ср. ставка
    9 ставки

    expert on VHDL is need for a project on digital thermostat. This is a simple task. expert only should bid

    $73 (Avg Bid)
    $73 Ср. ставка
    20 ставки

    build a communication block in VHDL at Xilinx environment

    $402 (Avg Bid)
    $402 Ср. ставка
    14 ставки
    $126 Ср. ставка
    16 ставки

    i have a task related to Communication VHDL Xilinx, i will share the details in chat.

    $115 (Avg Bid)
    $115 Ср. ставка
    19 ставки

    i need vhdl project for fpga bord i need skeleton and can move

    $24 (Avg Bid)
    $24 Ср. ставка
    14 ставки

    Need help developing a face detection system with the DE2-115 board and OV7670. I already developed the code for the face detection but in MatLab.

    $220 (Avg Bid)
    $220 Ср. ставка
    14 ставки

    i want to realize the transfer function on fpga so any one with knowledge of vhdl and quartus tool can bid Thank you

    $37 (Avg Bid)
    $37 Ср. ставка
    6 ставки

    I need you to implement a vcdl design project

    $72 (Avg Bid)
    $72 Ср. ставка
    16 ставки

    ...in der Digital- / Analotechnik - Kenntnisse von Simulations- und Prüfumgebungen - Kenntnisse mit technischer Dokumentation/Nachweisführung. Technisch: - OrCAD, PSpice, FPGA/VHDL, C++ - DO-254, MIL-STD-1553...

    $5789 (Avg Bid)
    $5789 Ср. ставка
    3 ставки

    I am looking someone who can fix the errors of the game tic tac toe in VHDL for DE2-115 and prepare report.

    $75 (Avg Bid)
    $75 Ср. ставка
    4 ставки

    I need you to develop some VHDL designs for me. I would like this software to be developed in VHDL hardware descriptive language. With a  VHDL design and simulation

    $251 (Avg Bid)
    $251 Ср. ставка
    3 ставки

    this is my brief description of my project and please only serious people who would like to work and help me make a bid MY FPGA board is DEO nano SOC CYCLONE 5 1. reading an anolog signal (adc is available on board )ltc2308 is the adc which is available on fpga a board 2. realization of PID controller on FPGA 3. realization of process module on fpga

    $366 (Avg Bid)
    $366 Ср. ставка
    2 ставки

    ...kindly dont get fooled with such experienced guys and ruin your money and time. and this is my brief description of my project and please only serious people who would like to work and help me make a bid MY FPGA board is DEO nano SOC CYCLONE 5 1. reading an anolog signal (adc is available on board )ltc2308 is the adc which is available on fpga a board

    $58 - $140 / hr
    $58 - $140 / hr
    0 ставки
    $16 / hr Ср. ставка
    12 ставки
    $25 Ср. ставка
    5 ставки

    Develop a musical bell that will play a selected and programmed song in the FPGA.

    $86 (Avg Bid)
    $86 Ср. ставка
    4 ставки

    Hi, I have opencv python programs want to implement them on the ZYNQ SoC. To be in precise want to implement custom object detection(using opencv, tensorflow)...implement them on the ZYNQ SoC. To be in precise want to implement custom object detection(using opencv, tensorflow) on to ZYNQ board. And also converting the python program to VHDL/Verilog.

    $132 (Avg Bid)
    $132 Ср. ставка
    7 ставки

    Expert in VHDL needed to work on a code

    $13 / hr (Avg Bid)
    $13 / hr Ср. ставка
    14 ставки

    Implement an algorithm in vhdl done in Matlab using System Generator

    $97 (Avg Bid)
    $97 Ср. ставка
    11 ставки

    ...5ms / 20ns = 125000 dcycle_mid = (dcycle_max – dcycle_min) / 2 = 75000 Για την περιστροφή του servo θα χρησιμοποιήσουμε τα δύο κουμπιά π&omic...

    $40 (Avg Bid)
    $40 Ср. ставка
    1 ставки

    1. Create a top level VHDL file for the project. VHDL code should be well formatted and commented. 2. Add two instantiations of a sync counter to the top level that are customized for the horizontal and vertical sync signals 3. Adapt the tesbench from homework 2 to simulate the top level file. Simulations should be annotated to depict events important

    $77 (Avg Bid)
    $77 Ср. ставка
    6 ставки

    Necesito hacer un programa en VHDL de un reloj (formato 24hs), con cronometro y con alarma. Cuando cambio a cada uno. no se debe perder la cuenta de la hora, cronometro o la alarma seteada. El reloj, la alarma y el cronometro se debe poder cargar/modificar manualmente. Detención y reinicio del cronometro. Cuando la hora del alarma coincida con el clock

    $180 (Avg Bid)
    $180 Ср. ставка
    1 ставки
    $21 Ср. ставка
    1 ставки

    Implement a program on VHDL

    $30 (Avg Bid)
    $30 Ср. ставка
    1 ставки

    vhdl code for wireless adhoc network and its implementation in FPGA,

    $141 (Avg Bid)
    $141 Ср. ставка
    4 ставки

    Convert C code to VHDL for BDLC, see attached datasheet. C code is available from TI website (or I can provide). Need to convert code, which is based on document into VHDL. Deliverables: VHDL code + working testbench + block diagram Need to be knowledgeable in Motor Control, C/C++ and VHDL.

    $416 (Avg Bid)
    $416 Ср. ставка
    15 ставки
    $27 / hr Ср. ставка
    14 ставки

    I want someone to write in vhdl an 8-bit harvard architecture CPU

    $146 (Avg Bid)
    $146 Ср. ставка
    4 ставки

    BId only if u can do only the second...dropping it and seeing it through a stereoscope lensIn perspective projection and the use of two center projection (off-axis projection) 2,Implement hardware system using vhdl language and xilinx 9.2i software And executed on spartan -3e linen The graphic is displayed on an external screen only the second Part

    $177 (Avg Bid)
    $177 Ср. ставка
    2 ставки

    Write a VHDL code to use two ultrasonic sensors as detectors, placed one at entrance and other at exit of a parking space. When the ultrasonic detects a car, use a counter to count the cars entering and decrement when a car exits. There is an RGB led place at each gate (entry &exit) which is used to indicate opening and closing of gates. Entry gate

    $30 (Avg Bid)
    $30 Ср. ставка
    2 ставки