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Designing a testbench in verilog

24 фрилансеров(-а) в среднем готовы выполнить эту работу за ₹1273

ahmedmohamed85

A proposal has not yet been provided

₹1500 INR за 1 день
(294 отзывов(-а))
7.6
raulbehl

Hello! Please check my reviews to know a bit about me ! Thank you

₹1500 INR за 1 день
(50 отзывов(-а))
5.7
rohi1710rohi1710

Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TS Больше

₹1500 INR за 1 день
(5 отзывов(-а))
4.6
SANGITAR

I am ready to take on the task,have proficiency with verilog. you can expect 100 percent time bound results, will complete asap.

₹2250 INR за 1 день
(3 отзывов(-а))
4.1
₹1500 INR за 1 день
(14 отзывов(-а))
4.2
₹1300 INR за 2 дней(-я)
(13 отзывов(-а))
3.9
SqUa11

Hello, My name is Mohamed. I have 5 years experience in VHDL and VErilog. I checked your project description and I can handle ur task contact me for more details. Regards

₹1300 INR за 1 день
(16 отзывов(-а))
3.9
jasnaikaran

Hello, I am an electronics engineer having experience of FPGA based digital system design for more than 5 years.

₹850 INR за 1 день
(4 отзывов(-а))
3.0
luffy08

Hello sir, I am a professional hardware engineer. I've done many projects on IP core using Verilog. It would be my pleasure to work on your project. Please contact me to discuss the details. Thank you for your cons Больше

₹1500 INR за 1 день
(3 отзывов(-а))
2.5
abuzduga

Do you want support for assertions in your testbench ? SVA ? Do you have a timing diagram ? Is there a need for special software, like Quartus or Modelsim ?

₹1250 INR за 2 дней(-я)
(1 отзыв)
2.3
pepsmich

Hi, I can help you get this done. I did at least 2 vhdl codes in this site and both had testbenches for simulation. I cannot see any attached file. Should you be interested, please let me know.

₹1300 INR за 1 день
(2 отзывов(-а))
2.4
SEELaboratory

I have expearence in Altera Quartus and Modelsim. So, can write code in Quiartus and I can test it in Modelsim. I am ready to do it at a lower price for reviews.

₹600 INR за 2 дней(-я)
(0 отзывов(-а))
1.4
KapilanLearn

I ahve the experience of implementing a full processor in fpga using verilog which required much of test bench works. l can surely do it

₹1250 INR за 3 дней(-я)
(0 отзывов(-а))
0.0
₹1550 INR за 1 день
(0 отзывов(-а))
0.0
mahmoudmaher2011

I think you need someone with great verification experience, and I worked in multinational companies before.

₹1300 INR за 1 день
(0 отзывов(-а))
0.0
praveenmaddirala

A proposal has not yet been provided

₹1300 INR за 1 день
(0 отзывов(-а))
0.0
dangluonghoangvu

Hi guys, I am an Logic design engineer. I think i can help you on this project. I have enviroment for simulation and i can release code and simulation result (picture file or wave file). Thanks, Vu

₹1250 INR за 1 день
(0 отзывов(-а))
0.0
joshipriyankk

- test bench in verilog / system verilog . - possible test case list with standard test bench code. - verification environment architecture. - batch mode display for important signal.

₹1150 INR за 1 день
(0 отзывов(-а))
0.0
manojexp86

A proposal has not yet been provided

₹1050 INR за 1 день
(0 отзывов(-а))
0.0
maninder10061996

I am new to freelancing but have a handsome experience in verilog as i have done and tested several projects on my know in verilog. i hope the above line explains a low fee for this project. The inputs i will be requir Больше

₹601 INR за 1 день
(0 отзывов(-а))
0.0