need help with assembly

Suppose we have a five-stage pipeline (fetch, decode/read reg, ALU, memory, write result). What dependencies and/or hazards exist in the following sequence of instructions? Assume the first operand is the destination and there is a unified L1 cache. List them in the form g-h, j-k … List every dependency and/or hazard, even if it does not result in a pipeline bubble.

a. add r5,r6,r7

b. ld r9,18(r5)

c. add r8,r6,r9

d. or r3,r7,r5

e. andi r6,r5,15

f. brpl r5,r9

Квалификация: Ассемблирование, Программирование на С, Программирование на C++, Микроконтроллер, x86/x64 Assembler

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