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Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices

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The need for performing deep neural network inferences

on resource-constrained embedded devices (e.g., Internet

of Things nodes) requires specialized architectures to achieve

the best trade-off among performance, energy, and cost. One

of the most promising architectures in this context is based on

massive parallel and specialized cores interconnected by means

of a Network-on-Chip (NoC). In this paper, we extensively evaluate

NoC-based deep neural network accelerators by exploring

the design space spanned by several architectural parameters

including, network size, routing algorithm, local memory size,

link width, and number of memory interfaces. We show how

latency is mainly dominated by the on-chip communication

whereas energy consumption is mainly accounted by memory

(both on-chip and off-chip). The outcome of the analysis, thus,

pushes toward a research line devoted to the optimization of the

on-chip communication fabric and the memory subsystem for

performance improvement and energy efficiency, respectively.

Index Terms—Deep Neural Network accelerator, Network-on-

Chip, Performance evaluation, Energy analysis, Design space

exploration, IoT edge devices.

Навыки: Deep Learning, Python, Machine Learning (ML), Neural Networks, Internet of Things (IoT)

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( 0 отзыв(-а, -ов) ) visakhapatnam, India

ID проекта: #26095305

1 фрилансер в среднем готов выполнить эту работу за ₹12500

hafid88

Hello, Currently, I'm working on a Korean University as a researcher, and I'm doing Machine Learning and many stuff like this one, I can help you to finish this job soon. if you wanna tell me something like using cus Больше

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