I am a senior digital design engineer,
I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog.
I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC.Больше
I am a PhD candidate in Electrical Engineering (Control System). I have plenty of experience in firmware development and micro-controller developments.
My Core Skills are:
-MATLAB, SIMULINK MODLING AND SIMULATБольше
I am Mtech graduate from IIT Roorkee and working on Hardware Description Languages Verilog and VHDL for the past 3 years. I have done many Digital system design projects using RTL design and FSM and had a working Больше
I am researcher and assistant professor in university level for electrical and computer engineering. I completed phd in floating point hardware design. According to your requirement, Verilog code will be used to impleБольше