Diseño sencillo de RTL basado en ASM e instanciación de componentes
Оплачивается при доставке
I am looking for a freelancer who can help me with a simple RTL design based on ASM and component instantiation.
Skills and Experience:
- Proficiency in RTL design and ASM design
- Experience with component instantiation
- Familiarity with the desired technology or platform
- Ability to work with basic level of complexity in the design
ID проекта: #37235190
18 фрилансеров(-а) готовы выполнить эту работу в среднем за €166
I’m an ASIC/FPGA engineer who has 5 years of experience in HDL design field. I’ve worked with ASM before and have the basic knowledge this project requires. Hire me.
Hi there I am professional electronics engineer and have more than 5 years experience in verilog vhdl coding and can help you with this project. Just check my profile and share your details. Thanks
With over 9 years in ASIC design, I strongly believe that I can handle this project well. I will start by architecture for it with detail HWM before starting coding.
Hi I have more than 7 years of experience in top mnc company . I done lot of rtl projects past 7 years . I can give full code of rtl and testbench setup and design documentations.
I have experience in module instantiation , interface connectivity, simulating the block on vivado , questa and sim vision. I have brief experience in RTL design.