Verilog FPGA Code implementation of FEC RS(198, 194) decoder.
15 фрилансеров(-а) готовы выполнить эту работу в среднем за $903
Hi I am a researcher and circuit designer in vlsi using verilog and block level design. I hold phd in vlsi. Kindly share your details about your project. You can check my portfolios for recent projects. Thank you
Hello, I'll be glad to help you but would like to understand the full requirements of your project first. Please contact me for an unbinding conversation so we can discuss your project in detail. Thanks, Shai