Изображение профиля gaihrekrishna
@gaihrekrishna
Флаг Nepal Kathmandu, Nepal
На сайте с 6 октября 2013 г.
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gaihrekrishna

В сети Офлайн
I have expertise on Machine Learning acceleration with FPGA [Cloud+Edge]. I am working on FPGA design since 5 years with expertise on FPGA Design with VHDL, Verilog, Python, OpenCL & Tcl. I have Tools experience of Xilinx VIVADO, ISE, VIVADO HLS, VIVADO SDK, SDSoC and Device experience of Xilinx Spartan, Zynq, Kintex and Vertex 7 Series and Ultrascale FPGA.I have skills on PYNQ development, Signal processing & Machine learning/Neural Net [login to view URL] can also contact me . Featured FPGA Projects: +Video/Image Processing with VHDL/Verilog and High Level Synthesis +Crypto Algorithm Implementation on FPGA +Tcl Scripting for FPGA Design +PCIe based FPGA Implementation +AES IP Design and Implementation on FPGA [128,256 bit] +FMC HDMI CAM module interfacing with ZedBoard FPGA -FPGA Hardware (i have): ZedBoard,Zybo, Pynq, Nexys 4, Nexys 2, Spartan 3E, FMC-HDMI-CAM Module form Avnet.
$18 USD/hr
1 отзыв
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Portfolio Items

Последние отзывы

Опыт работы

FPGA Research Lead

Jun 2017

Working on FPGA Development with VHDL, Verilog, HLS, MATLAB with Tools Xilinx VIVADO, HLS, SDK, SDSoC, SDAccel. I have expertise on Embedded System Design with Xilinx Zynq FPGA, Video Processing with Zynq, Machine Learning with FPGA, PYNQ Development, IP Development, Complete System Deployment on AWS, Nimbix and Plunify FPGA based Clouds.

FPGA Design Engineer

Jan 2013 - May 2017 (4 years)

FPGA Design with VHDL/Verilog/Tcl and Xilinx Tools/Hardware

Образование

M.Sc Engineering

2013 - 2015 (2 years)

Квалификация

FPGA Trainer (2016)

Digitronix Nepal

FPGA Training with Spartan and Zynq FPGA for Industrial and Academic Professionals.

Публикации

ARM Based Computing Technology for SD

IOE Graduate Conference 2015

Face Detection and Recognition with PYNQ FPGA

The Face detection and recognition algorithm is implemented on the PYNQ FPGA. The VIVADO based overlay and Python methodology for face detection and recognition is followed on the PYNQ FPGA Board.

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